SAK-C167CS-L40M CA+ Infineon Technologies, SAK-C167CS-L40M CA+ Datasheet - Page 34

• Manufacturer Part Number: SAK-C167CS-L40M CA+
• Description: IC MCU 16BIT 40MHZ MQFP-144
• Manufacturer: Infineon Technologies
• Series: C16xxr

Specifications of SAK-C167CS-L40M CA+

• Core Processor: C166
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Type: ROMless
• Ram Size: 11K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144- BSQFP
• Data Bus Width: 16 bit
• Data Ram Size: 11 KB
• Interface Type: 1xUSART, 1xSSC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 9
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Packages: PG-MQFP-144
• Max Clock Frequency: 40.0 MHz
• Sram (incl. Cache): 11.0 KByte
• Can Nodes: 2
• A / D Input Lines (incl. Fadc): 24
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: K167CSL40MCAZNP; K167CSL40MCAZXP; SAK-C167CS-L40M CA+; SAK-C167CS-L40MCAIN; SAKC167CSL40MCAXT; SP000103490

C167CS-4R
C167CS-L
A/D Converter
For analog signal measurement, a 10-bit A/D converter with 24 multiplexed input
channels (16 standard channels and 8 extension channels) and a sample and hold
circuit has been integrated on-chip. It uses the method of successive approximation. The
sample time (for loading the capacitors) and the conversion time is programmable and
can so be adjusted to the external circuitry.
Overrun error detection/protection is provided for the conversion result register
(ADDAT): either an interrupt request will be generated when the result of a previous
conversion has not been read from the result register at the time the next conversion is
complete, or the next conversion is suspended in such a case until the previous result
has been read.
For applications which require less than 24 analog input channels, the remaining
channel inputs can be used as digital input port pins.
The A/D converter of the C167CS supports four different conversion modes. In the
standard Single Channel conversion mode, the analog level on a specified channel is
sampled once and converted to a digital result. In the Single Channel Continuous mode,
the analog level on a specified channel is repeatedly sampled and converted without
software intervention. In the Auto Scan mode, the analog levels on a prespecified
number of channels (standard or extension) are sequentially sampled and converted. In
the Auto Scan Continuous mode, the number of prespecified channels is repeatedly
sampled and converted. In addition, the conversion of a specific channel can be inserted
(injected) into a running sequence without disturbing this sequence. This is called
Channel Injection Mode.
The Peripheral Event Controller (PEC) may be used to automatically store the
conversion results into a table in memory for later evaluation, without requiring the
overhead of entering and exiting interrupt routines for each data transfer.
After each reset and also during normal operation the ADC automatically performs
calibration cycles. This automatic self-calibration constantly adjusts the converter to
changing operating conditions (e.g. temperature) and compensates process variations.
These calibration cycles are part of the conversion cycle, so they do not affect the normal
operation of the A/D converter.
In order to decouple analog inputs from digital noise and to avoid input trigger noise
those pins used for analog input can be disconnected from the digital IO or input stages
under software control. This can be selected for each pin separately via registers
P5DIDIS (Port 5 Digital Input Disable) and P1DIDIS (PORT1 Digital Input Disable).
Data Sheet
30
V2.2, 2001-08