UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 664

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UPD70F3736GK-GAK-AX

Manufacturer Part Number
UPD70F3736GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3736GK-GAK-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
66
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3736GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
664
(4) Noise elimination control register (NFC)
Remarks 1. Since sampling is performed 3 times, the reliably eliminated noise width is 2 sampling clocks.
Digital noise elimination can be selected for the INTP3 pin. The noise elimination settings are performed using
the NFC register.
When digital noise elimination is selected, the sampling clock for digital sampling can be selected from among
f
Even when digital noise elimination is selected, using f
INTP3 interrupt request signal to release the IDLE1, IDLE2, and STOP modes.
This register can be read or written in 8-bit units.
Reset sets this register to 00H.
Caution After the sampling clock has been changed, it takes 3 sampling clocks to initialize the digital
XX
/64, f
2. In the case of noise with a width smaller than 2 sampling clocks, an interrupt request signal is
XX
/128, f
After reset: 00H
generated if noise synchronized with the sampling clock is input.
NFC
noise eliminator. Therefore, if an INTP3 valid edge is input within these 3 sampling clocks
after the sampling clock has been changed, an interrupt request signal may be generated.
Therefore, be careful about the following points when using the interrupt and DMA functions.
• When using the interrupt function, after the 3 sampling clocks have elapsed, enable
• When using the DMA function (started by INTP3), enable DMA after 3 sampling clocks
interrupts after the interrupt request flag (PIC3.PIF3 bit) has been cleared.
have elapsed.
XX
/256, f
NFEN
NFEN
NFC2
CHAPTER 19 INTERRUPT/EXCEPTION PROCESSING FUNCTION
0
1
0
0
0
0
1
1
Other than above
XX
/512, f
Analog noise elimination (60 ns (TYP.))
Digital noise elimination
R/W
NFC1
0
0
0
1
1
0
0
XX
Preliminary User’s Manual U18952EJ1V0UD
/1,024, and f
Address: FFFFF318H
NFC0
0
0
1
0
1
0
1
Settings of INTP3 pin noise elimination
f
f
f
f
f
f
Setting prohibited
XT
XX
XX
XX
XX
XX
XT
/64
/128
/256
/512
/1,024
. Sampling is performed 3 times.
(subclock)
0
XT
as the sampling clock makes it possible to use the
0
Digital sampling clock
NFC2
NFC1
NFC0

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