UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 218

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UPD70F3736GK-GAK-AX

Manufacturer Part Number
UPD70F3736GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3736GK-GAK-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
66
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3736GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
218
(1) External event count mode operation flow
<1> Count operation start flow
<2> Count operation stop flow
Remark
INTTPnCC0 signal
TPnCCR0 register
(TPnCKS0 to TPnCKS2 bits)
Figure 7-12. Flow of Software Processing in External Event Count Mode
Register initial setting
n = 0 to 2, 5
16-bit counter
TPnCCR0 register,
TPnCTL1 register,
TPnIOC0 register,
TPnIOC2 register,
TPnCTL0 register
TPnCE bit = 1
TPnCE bit = 0
TPnCE bit
START
FFFFH
STOP
0000H
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
Preliminary User’s Manual U18952EJ1V0UD
<1>
D
Initial setting of these registers
is performed before the
TPnCE bit is set to 1.
The TPnCKS0 to TPnCKS2 bits can
be set when counting starts
(TPnCE bit = 1).
The counter is initialized and counting
is stopped by clearing the TPnCE bit to 0.
0
D
0
D
0
D
0
<2>

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