UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 434

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UPD70F3736GK-GAK-AX

Manufacturer Part Number
UPD70F3736GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet

Specifications of UPD70F3736GK-GAK-AX

Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
66
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3736GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
13.6 Cautions
434
(1) When A/D converter is not used
(2) Input range of ANI0 to ANI7 pins
(3) Countermeasures against noise
(4) Alternate I/O
When the A/D converter is not used, the power consumption can be reduced by clearing the ADA0M0.ADA0CE
bit to 0.
Input the voltage within the specified range to the ANI0 to ANI7 pins. If a voltage equal to or higher than AV
or equal to or lower than AV
pins, the conversion value of that channel is undefined, and the conversion value of the other channels may
also be affected.
To maintain the 10-bit resolution, the ANI0 to ANI7 pins must be effectively protected from noise. The influence
of noise increases as the output impedance of the analog input source becomes higher. To lower the noise,
connecting an external capacitor as shown in Figure 13-12 is recommended.
The analog input pins (ANI0 to ANI7) function alternately as port pins. When selecting one of the ANI0 to ANI7
pins to execute A/D conversion, do not execute an instruction to read an input port or write to an output port
during conversion as the conversion resolution may drop.
Also the conversion resolution may drop at the pins set as output port pins during A/D conversion if the output
current fluctuates due to the effect of the external circuit connected to the port pins.
If a digital pulse is applied to a pin adjacent to the pin whose input signal is being converted, the A/D
conversion value may not be as expected due to the influence of coupling noise. Therefore, do not apply a
pulse to a pin adjacent to the pin undergoing A/D conversion.
Figure 13-12. Processing of Analog Input Pin
SS
(even within the range of the absolute maximum ratings) is input to any of these
Preliminary User’s Manual U18952EJ1V0UD
CHAPTER 13 A/D CONVERTER
Clamp with a diode with a low V
if noise equal to or higher than AV
to or lower than AV
ANI0 to ANI7
V
AV
AV
V
DD
SS
REF0
SS
SS
may be generated.
F
(0.3 V or less)
REF0
or equal
REF0

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