UPD70F3736GK-GAK-AX Renesas Electronics America, UPD70F3736GK-GAK-AX Datasheet - Page 217
UPD70F3736GK-GAK-AX
Manufacturer Part Number
UPD70F3736GK-GAK-AX
Description
MCU 32BIT V850ES/JX3-L 80-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Jx3-Lr
Datasheet
1.UPD70F3736GK-GAK-AX.pdf
(830 pages)
Specifications of UPD70F3736GK-GAK-AX
Package / Case
*
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Speed
20MHz
Number Of I /o
66
Core Processor
RISC
Program Memory Type
FLASH
Ram Size
16K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b, D/A 1x8b
Oscillator Type
Internal
Peripherals
DMA, LVD, PWM, WDT
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
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Price
Company:
Part Number:
UPD70F3736GK-GAK-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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(f) TMPn capture/compare register 0 (TPnCCR0)
(g) TMPn capture/compare register 1 (TPnCCR1)
Caution When an external clock is used as the count clock, the external clock can be input
If D
signal (INTTPnCC0) is generated when the number of external event counts reaches (D
Usually, the TPnCCR1 register is not used in the external event count mode. However, the set value of
the TPnCCR1 register is transferred to the CCR1 buffer register. When the count value of the 16-bit
counter matches the value of the CCR1 buffer register, a compare match interrupt request signal
(INTTPnCC1) is generated.
Therefore, mask the interrupt signal by using the interrupt mask flag (TPnCCMK1).
Remarks 1. TMPn I/O control register 1 (TPnIOC1) and TMPn option register 0 (TPnOPT0) are not
0
Figure 7-11. Register Setting for Operation in External Event Count Mode (2/2)
is set to the TPnCCR0 register, the counter is cleared and a compare match interrupt request
only from the TIPn0 pin. At this time, set the TPnIOC1.TPnIS1 and TPnIOC1.TPnIS0
bits to 00 (capture trigger input (TIPn0 pin): no edge detection).
2. n = 0 to 2, 5
used in the external event count mode.
CHAPTER 7 16-BIT TIMER/EVENT COUNTER P (TMP)
Preliminary User’s Manual U18952EJ1V0UD
0
+ 1).
217
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