D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 512

MPU 3V 8K,PB-FREE, 256-BGA

D17760BP200ADV

Manufacturer Part Number
D17760BP200ADV
Description
MPU 3V 8K,PB-FREE, 256-BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of D17760BP200ADV

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D17760BP200ADV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 11 Direct Memory Access Controller (DMAC)
11.4.3
Channel Priorities
Receiveing simultaneous transfer requests on two or more channels, the DMAC selects a channel
according to a predetermined priority system, either in a fixed mode or round robin mode. The
mode is selected with priority bits PR1 and PR0 in DMAOR.
(1) Fixed Mode
In this mode, the relative channel priorities remain fixed. The following priority orders are
available in fixed mode:
• CH0 > CH1 > CH2 > CH3 > CH4 > CH5 > CH6 > CH7
• CH0 > CH2 > CH3 > CH4 > CH5 > CH6 > CH7 > CH1
• CH2 > CH0 > CH1 > CH3 > CH4 > CH5 > CH6 > CH7
Select one of these priority orders by setting the PR1 and PR0 bits in DMAOR.
(2) Round Robin Mode
In round robin mode, each time the transfer of one transfer unit (byte, word, longword, quadword,
or 32 bytes) ends on a given channel, that channel is assigned the lowest priority level. This is
illustrated in figure 11.4. The order of priority in round robin mode immediately after a reset is
CH0 > CH1 > CH2 > CH3 > CH4 > CH5 > CH6 > CH7. If no transfer request is accepted for any
channel during DMA transfer, the priority order becomes CH0 > CH1 > CH2 > CH3 > CH4 >
CH5 > CH6 > CH7.
Rev. 2.00 Feb. 12, 2010 Page 428 of 1330
REJ09B0554-0200

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