D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 471

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

DMABRG
Ch.
7
Common
DMA BRG control register
DMA audio source address
register 0
DMA audio destination address
register 0
DMA audio transmit transfer count
register 0
DMA audio receive transfer count
register 0
DMA audio control register 0
DMA audio transmit transfer
counter 0
DMA audio receive transfer
counter 0
DMA audio source address
register 1
DMA audio destination address
register 1
DMA audio transmit transfer count
register 1
DMA audio receive transfer count
register 1
Register Name
DMA source address register 7
DMA destination address register 7 DAR7
DMA transfer count register 7
DMA channel control register 7
DMA operation register
DMA request resource selection
register A
DMA request resource selection
register B
DMA request control register
Abbrev.
SAR7
DMATCR7 Undefined
DMAOR
DMARSRA H'0000 0000
DMARSRB H'0000 0000
DMARCR
DMABRG
CR
DMAATX
SAR0
DMAARX
DAR0
DMAATX
TCR0
DMAARX
TCR0
DMAACR0 H'0000 0000
DMAATX
TCNT0
DMAARX
TCNT0
DMAATX
SAR1
DMAARX
DAR1
DMAATX
TCR1
DMAARX
TCR1
CHCR7
H'0000 0000
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Power-on
Reset by
RESET
Pin/WDT/
H-UDI
Undefined
Undefined
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
Undefined
Undefined
Undefined
Undefined
H'0000 0000
Undefined
Undefined
Undefined
Undefined
Undefined
Undefined
Manual Reset
by RESET
Pin/WDT/
Multiple
Exception
Undefined
Undefined
Undefined
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
H'0000 0000
Rev. 2.00 Feb. 12, 2010 Page 387 of 1330
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Sleep
by Sleep
Instruction/
Deep Sleep
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
by
Hardware
REJ09B0554-0200
*
Standby
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
by
Software/
Each
Module
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained