D17760BP200ADV Renesas Electronics America, D17760BP200ADV Datasheet - Page 1137

• Manufacturer Part Number: D17760BP200ADV
• Description: MPU 3V 8K,PB-FREE, 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of D17760BP200ADV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 69
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

• Scan Mode Operation: After A/D conversion is performed, the interval for storing the result
Interrupt signal
in the corresponding data register is fixed at 256 cycles when Pck/8 is selected as the clock
division ratio. Therefore, data is stored in the data registers every 256 cycles.
After an interrupt occurs, data should be read within 256 cycles. After this read, data should be
read at the specified intervals.
Figure 29.5 Timing for Data Write when Four Channels Are Selected in Multi Mode
(read interval)
ADDRA write
enable signal
ADDRB write
enable signal
ADDRC write
enable signal
ADDRD write
enable signal
Read signal
ADDRC
ADDRD
ADDRA
ADDRB
ADF
Pck
Cycles through all selected channels (AN0 to AN3)
A/D conversion 1
A/D conversion 2
A/D conversion 3
ADI Interrupt occurs
Read of A/D
conversion 1
256 clocks
A/D conversion 4
Read of A/D
conversion 2
A/D conversion 1'
256 clocks
Rev. 2.00 Feb. 12, 2010 Page 1053 of 1330
Read at intervals of 256 clocks
Read of A/D
conversion 3
256 clocks
A/D conversion 2'
Read of A/D
conversion 4
A/D conversion 3'
256 clocks
REJ09B0554-0200
A/D conversion 4'
Read of A/D
conversion 1'
256 clocks