HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 940
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
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Note:* These bits are readable/writable bits. When writing 0, these bits are initialized, while writing
Rev. 2.00 Feb. 12, 2010 Page 856 of 1330
REJ09B0554-0200
Bit
3
2
1
0
1 is ignored.
Bit Name
RXOW
RXFL
TXFN
TXFL
Initial Value
0
0
0
0
R/W
R/W*
R
R
R
Description
Receive Buffer Overrun Warning Flag
This status flag is set to 1 when a new serial data
transfer starts and the previous received data has
not been read from SPRBR. The RXOW remain set
to 1 until writing a 0 to its bit position.
If RXOW= 1 and ROIE = 1 then the interrupt is
generated.
Receive Buffer Full Status Flag
This status flag indicates that new data is available
in the SPRBR and has not yet been read. It is set
to 1 at the completion of a serial bus transfer at the
point the shift register contents are loaded into the
SPRBR. This bit is cleared to 0 by reading SPRBR.
If RXFL = 1 and RXDE = 1 then the DMA transfer
request enabled.
Transmit Complete Status Flag
This status flag indicates that the last transmission
has completed. It is set to 1 when SPTBR is able to
write more data from the peripheral bus. This bit is
cleared to 0 by writing more data SPTBR.
If TXFN = 1 and TFIE = 1 then the interrupt is
generated.
Transmit Buffer Full Status Flag
This status flag indicates SPTBR has transmitted
data. It is set to 1 when SPTBR is written with data
from the peripheral bus. This bit is cleared to 0
when SPTBR is able to accept more data from the
peripheral bus.
If TXFL = 0 (i.e. the SPTBR is empty) and TXDE =
1 then the DMA transfer request enabled.
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