HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 799
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417760BL200AV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6417760BL200AV
Manufacturer:
RENENAS
Quantity:
20 000
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Bit
7
6 to 4
3
2
1
Bit Name
BREN
CKDV
MUEN
CPEN
TRMD
Initial Value
0
All 0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
0: Burst mode is disabled.
1: Burst mode is enabled.
Burst mode is used in conjunction with
compressed mode (CPEN = 1). When burst mode
is enabled the SSI_SCK signal is gated. Clock
pulses are output only when there is valid serial
data being output on SSI_SDATA.
Description
Burst Mode Enable
Serial Oversampling Clock Division Ratio
These bits define the division ratio between
oversampling Clock (HAC_BIT_CLK) and the
serial bit clock.
These bits are ignored if SCKD = 0.
The Serial Bit Clock is used for the shift register
and is provided on the SSI_SCK pin.
000: (Serial bit clock frequency = oversampling
001: (Serial bit clock frequency = oversampling
010: (Serial bit clock frequency = oversampling
011: (Serial bit clock frequency = oversampling
100: (Serial bit clock frequency = oversampling
101: Setting prohibited
110: Setting prohibited
111: Setting prohibited
Mute Enable
When in transmit mode (TRMD = 1), by making
MUEN = 1, the output of SSI_SDATA will be in
low level.
0: The SSI module is not muted.
1: The SSI module is muted.
Compressed Mode Enable
0: Compressed mode disabled
1: Compressed mode enabled
Note: In compressed mode (CPEN = 1), only
Transmit/Receive Mode Select
0: The SSI module is in receive mode
1: The SSI module is in transmit mode
clock frequency/1)
clock frequency/2)
clock frequency/4)
clock frequency/8)
clock frequency/16)
use operations other than slave
transmitter (SWSD = 0 and TRMD = 1).
Rev. 2.00 Feb. 12, 2010 Page 715 of 1330
REJ09B0554-0200
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