HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 858
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Company:
Part Number:
HD6417760BL200AV
Manufacturer:
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Quantity:
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Part Number:
HD6417760BL200AV
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Bit
16
15
14 to 2
1
0
21.3.22 Root Hub Port Status 1 Register (HcRhPortStatus1)
HcRhPortStatus1 is used for controlling and reporting the port event for each port. The upper word
indicates the change of the port status and the lower word indicates the port status.
Some status bits are implemented with special write behavior (see below). If a transaction (token
through handshake) is in progress when a write to change port status occurs, the resulting port
status change must be postponed until the transaction completes. Reserved bits should always be
written 0.
Since this register functions differently in read than in write, functional descriptions will be made
separately below. Note that bit titles in read are different from those in write so that the bit titles
can always suit the functions. For the bit name, the bit title for a read operation is used. Taking a
Rev. 2.00 Feb. 12, 2010 Page 774 of 1330
REJ09B0554-0200
Bit Name
LPSC
DRWE
⎯
OCI
LPS
Initial Value
0
0
All 0
0
0
R/W
W
W
R
R
W
Description
Set Global Power
In global power mode (PSM = 0), writing 1 to this bit
will power all ports on (and clear the PPS bit to 0). In
per-port power mode, it will set the PPS bit to 1 only
on ports whose PPCM bit is not set. Writing 0 has
no effect.
0: Operation is not affected
1: Power of all ports is turned on
Set Remote Wakeup Enable
Writing 1 to this bit sets the DRWE bit to 1. Writing 0
has no effect.
0: Operation is not affected
1: Device remote wakeup is enabled
Reserved
Always write 0 to this bit.
Reserved
Always write 0 to this bit.
Clear Global Power
In global power mode (PSM = 0), writing 1 to this bit
will power all ports off (and clear the PPS bit to 0). In
per-port power mode, it will clear the PPS bit to 0
only on ports whose PPCM bit is not set. Writing 0
has no effect.
0: Operation is not affected
1: Power of all ports is turned off
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