HD6417760BL200AV Renesas Electronics America, HD6417760BL200AV Datasheet - Page 1395
HD6417760BL200AV
Manufacturer Part Number
HD6417760BL200AV
Description
SH4 7760, 17 X17 256BGA, LCDC, U
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet
1.D6417760BP200ADV.pdf
(1418 pages)
Specifications of HD6417760BL200AV
Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
Audio Codec, CAN, EBI/EMI, FIFO, I²C, MFI, MMC, SCI, Serial Sound, SIM, SPI, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
69
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Company:
Part Number:
HD6417760BL200AV
Manufacturer:
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Quantity:
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Signal Name
HAC_BIT_CLK1*
DCK*
Legend:
Notes: 1. Z (I) or O (refresh) according to the register contents (BCR1.HIZCNT).
11
2. Depends on the refresh operation.
3. Z (I) or H (retained) according to the register contents (BCR1.HIZMEM).
4. Output when the auto-refresh is selected.
5. Pulled up or not according to the register contents (BCR1.OPUP).
6. Pulled up or not according to the register contents (BCR1.DPUP).
7. Pulled up using the pull-up MOSs. However, the pull-up MOSs cannot be used to pull-
8. Z or O according to the register contents (STBCR2.STHZ).
9. Pulled up or not according to the PFC register settings (see section 24, Pin Function
10. Hi-Z or not according to the PFC register settings (see section 24, Pin Function
11. Pulled up or not, and the multiplexed functions for IP modules are selected by the PFC
12. According to the ADC register settings. Hi-Z at initialization.
13. Pull-down for USB pins while not used.
14. Only low level output since these pins are open-drain pins. Pulled up when the I
15. Depends on the refresh and DMAC operations.
16. Z or O according to the register contents (FRQCR.CKOEN).
I: Input
O: Output
H: High level output
L: Low level output
Z: Hi-Z state
PI: Input pulled up with a built-in pull-up resistance.
PZ: Output pulled up with a built-in pull-up resistance.
up the mode pins at a power-on reset. For this purpose, pull-up or pull-down outside the
LSI.
Controller (PFC)). However, the PFC register settings are invalid in hardware standby
mode.
Controller (PFC)).
register settings (see section 24, Pin Function Controller (PFC)). However, the PFC
register settings are invalid in hardware standby mode. For details of the I/O control for
the selected IP modules, see the corresponding section. Selection of the GPIO
functions and the I/O control of the GPIO are determined according to the GPIO register
settings (see section 24, Pin Function Controller (PFC)).
in use.
11
DCK
PJ1
Pin Name
HAC_BIT_CLK1
PJ2
O
I/O
I
I/O
O
PZ
Power-on
PZ
PZ
PZ
Reset
PZ/O
Manual
I
I/O
O
Rev. 2.00 Feb. 12, 2010 Page 1311 of 1330
PZ/O
O
Sleep
I
I/O
PZ/O
O
Software
Z
Z/O
Standby
Z
Z
Hardware
Z
Z
REJ09B0554-0200
2
C is not
PZ/O
O
Bus
Release
I
I/O
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