HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 576

IC SH MPU ROMLESS 240BGA

HD6417727BP160CV

Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP160CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Section 17 Serial Communication Interface (SCI)
Serial Data Reception (Asynchronous Mode):
Figure 17.10 shows a sample flow chart for serial data reception. After enabling the SCI reception,
receive serial data following the procedure shown below:
Rev.6.00 Mar. 27, 2009 Page 518 of 1036
REJ09B0254-0600
No
No
and clear RDRF bit in SCSSR to 0
Clear the RE bit in SCSCR to 0
Read reception data of SCRDR
Read the RDRF bit in SCSSR
Read ORER, PER, and FER
PER, FER, ORER = 1?
Figure 17.10 Sample Serial Reception Data Flowchart (1)
All data received?
Start reception
End reception
bits in SCSSR
RDRF = 1?
No
Yes
Yes
Error processing
Yes
(2)
(3)
(1)
(1) Receive error processing and
(2) SCI status check and receive-
(3) To continue receiving serial
break detection:
If a receive error occurs, read
the ORER, PER and FER bits
of the SCSSR to identify the
error. After executing the
necessary error processing,
clear ORER, PER and FER all
to 0. Receiving cannot resume if
ORER, PER or FER remain set
to 1. When a framing error
occurs, the RxD0 pin can be
read to detect the break state.
data read:
Read the serial status register
(SCSSR), check that RDRF is
set to 1, then read receive data
from the receive data register
(SCRDR) and clear RDRF to 0.
The RXI interrupt can also be
used to determine if the RDRF
bit has changed from 0 to 1.
data:
Read the SCRDR receive data
and clear the RDRF flag in
SCSSR to 0 before the stop bit
of the current frame is received.

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