HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 332

IC SH MPU ROMLESS 240BGA

HD6417727BP160CV

Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP160CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Section 10 On-Chip Oscillation Circuits
Bit 4—Watchdog Timer Overflow (WOVF): Indicates that the WTCNT has overflowed in
watchdog timer mode. This bit is not set in interval timer mode.
Bit 4: WOVF
0
1
Bit 3—Interval Timer Overflow (IOVF): Indicates that the WTCNT has overflowed in interval
timer mode. This bit is not set in watchdog timer mode.
Bit 3: IOVF
0
1
Bits 2 to 0—Clock Select 2 to 0 (CKS2 to CKS0): These bits select the clock to be used for the
WTCNT count from the eight types obtainable by dividing the peripheral clock. The overflow
period in the table is the value when the peripheral clock (Pφ) is 15 MHz.
Bit 2: CKS2
0
1
Note: If bits CKS2 to CKS0 are modified when the WDT is running, the up-count may not be
Rev.6.00 Mar. 27, 2009 Page 274 of 1036
REJ09B0254-0600
performed correctly. Ensure that these bits are modified only when the WDT is not running.
Bit 1: CKS1
0
1
0
1
Description
No overflow
WTCNT has overflowed in watchdog timer mode
Description
No overflow
WTCNT has overflowed in interval timer mode
Bit 0: CKS0
0
1
0
1
0
1
0
1
Clock Division Ratio
1
1/4
1/16
1/32
1/64
1/256
1/1024
1/4096
(Initial value)
Overflow Period
(when Pφ = 15 MHz)
17 μs
68 μs
273 μs
546 μs
1.09 ms
4.36 ms
17.48 ms
69.91 ms
(Initial value)
(Initial value)

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