HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 534

IC SH MPU ROMLESS 240BGA

HD6417727BP160CV

Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP160CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Section 16 Realtime Clock (RTC)
16.3.4
Figure 16.4 shows how to use the alarm function.
Alarm can be generated using seconds, minutes, hours, day of the week, date, month, or any
combination of these. Set the ENB bits (bit 7) in the desired alarm registers to 1, and then set the
alarm time in the lower bits. Clear the ENB bits in the registers which are not used for the alarm to
0.
When the clock and alarm time match, the AF bit (bit 0) in RCR1 is set to 1. The alarm detection
can be checked by reading this bit, but normally it is checked by the interrupt generation. If the
AIE bit (bit 3) in RCR1 is written with 1, an interrupt is generated when an alarm occurs.
Rev.6.00 Mar. 27, 2009 Page 476 of 1036
REJ09B0254-0600
Alarm Function
(wait for interrupt or
Monitor alarm time
check alarm flag)
Clear alarm flag
Set alarm time
Clock running
Cancel alarm
interrupt
Figure 16.4 Using the Alarm Function
Always reset the alarm flag, since a flag may
have been set while the alarm time was being
set (clear the AF bit in RCR1 register to 0).
Disables interrupts (clears the AIE bit in
RCR1 to 0) in order to prevent erroneous
interrupts, and then writes 1.

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