HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 422
HD6417727BP160CV
Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.HD6417727BP100CV.pdf
(1098 pages)
Specifications of HD6417727BP160CV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD6417727BP160CV
Manufacturer:
LITEON
Quantity:
46 000
Company:
Part Number:
HD6417727BP160CV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 12 Bus State Controller (BSC)
12.3.9
With this LSI, address pin pull-up can be performed when the bus is released by setting the PULA
bit in BCR1 to 1. The address pins are pulled up for a 4-clock period after BACK is asserted.
Figure 12.34 shows the address pin pull-up timing. Similarly, data pin pull-up can be performed
by setting the PULD bit in BCR1 to 1. The data pins should be pulled up when the data bus is not
in use. The data pin pull-up timing for a read cycle is shown in figure 12.35, and the timing for a
write cycle in figure 12.36.
Rev.6.00 Mar. 27, 2009 Page 364 of 1036
REJ09B0254-0600
CKIO
A25 to A0
BACK
CKIO
D31 to D0
RD
CSn
Bus Pull-Up
Figure 12.35 Pins D31 to D0 Pull-Up Timing (Read Cycle)
Pull-up
Figure 12.34 Pins A25 to A0 Pull-Up Timing
Pull-up
Hi-Z
Pull-up
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