HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 556

• Manufacturer Part Number: HD6417727F100C
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100C

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 17 Serial Communication Interface (SCI)
Bit 2—Transmit End (TEND): Indicates that when the last bit of a serial character was
transmitted, the SCTDR did not contain valid data, so transmission has ended. TEND is a read-
only bit and cannot be written.
Bit 2: TEND
0
1
Bit 1—Multiprocessor Bit (MPB): Stores the value of the multiprocessor bit in receive data
when a multiprocessor format is selected for receiving in the asynchronous mode. The MPB is a
read-only bit and cannot be written.
Bit 1: MPB
0
1
Note: * If RE is cleared to 0 when a multiprocessor format is selected, the MPB retains its
Bit 0—Multiprocessor Bit Transfer (MPBT): Stores the value of the multiprocessor bit added to
transmit data when a multiprocessor format is selected for transmitting in the asynchronous mode.
The MPBT setting is ignored in the clock synchronous mode, when a multiprocessor format is not
selected, or when the SCI is not transmitting.
Bit 0: MPBT
0
1
Rev.6.00 Mar. 27, 2009 Page 498 of 1036
REJ09B0254-0600
previous value.
Description
Transmission is in progress
[Clear condition]
When TDRE=1 is read and then 0 is written to TDRE.
End of transmission
[Setting conditions]
1. When the chip is reset or enters standby mode
2. When TE is cleared to 0 in the serial control register (SCSCR)
3. If TDRE is 1 when the last bit of a one-byte serial character is transmitted.
Description
Multiprocessor bit value in receive data is 0*
Multiprocessor bit value in receive data is 1
Description
Multiprocessor bit value in transmit data is 0
Multiprocessor bit value in transmit data is 1
(Initial value)
(Initial value)
(Initial value)