HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 302

IC SUPERH MPU ROMLESS 240QFP

HD6417727F100C

Manufacturer Part Number
HD6417727F100C
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100C

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417727F100C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 Power-Down Modes and Software Reset
Table 9.4
Module
Interrupt controller (INTC)
On-chip clock pulse generator
(OSC)
User break controller (UBC)
Bus state controller (BSC)
Timer unit (TMU)
Realtime clock (RTC)
A/D converter (ADC)
D/A converter (DAC)
Li bus state controller (LBSC)
LCD controller (LCDC)
USB host controller (USBH)
USB function module (USBF)
AFE interface (AFEIF)
Serial IO with FIFO (SIOF)
PC card controller (PPC)
Note: * PCC0ISR reflects the normal status.
The procedure for moving to standby mode is as follows:
1. Clear the TME bit in the WDT’s timer control register (WTCSR) to 0 to stop the WDT.
2. After the STBY bit in the STBCR register is set to 1, the SLEEP instruction is executed.
3. When the chip enters standby mode and the clocks within the chip are halted, he STATUS1
Rev.6.00 Mar. 27, 2009 Page 244 of 1036
REJ09B0254-0600
Set the WDT’s timer counter (WTCNT) to 0 and set a value to the CKS2 to CKS0 bits in the
WTCSR register to secure the specified oscillation settling time.
pin output goes low and the STATUS0 pin output goes high.
Register States in Standby Mode
Registers Initialized
TSTR register
All registers
Registers Retaining Data
All registers
All registers
All registers
All registers
Registers other than TSTR
All registers
All registers
All registers
All registers
All registers
All registers
All registers
All registers
Registers other than PCC0ISR*

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