HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 248

• Manufacturer Part Number: HD6417727F100C
• Description: IC SUPERH MPU ROMLESS 240QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727F100C

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -

Section 7 Interrupt Controller (INTC)
Bit 0: IRQ0R
0
1
7.3.8
The IRR1 is an 8-bit read-only register that indicates whether DMAC or interrupt requests are
generated. This register is initialized to H'00 at power-on reset or manual reset, but is not
initialized in standby mode.
Bits 7 to 4—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 3—DEI3 Interrupt Request (DEI3R): Indicates whether a DEI3 (DMAC) interrupt request
is generated.
Bit 3: DEI3R
0
1
Bit 2—DEI2 Interrupt Request (DEI2R): Indicates whether a DEI2 (DMAC) interrupt request
is generated.
Bit 2: DEI2R
0
1
Bit 1—DEI1 Interrupt Request (DEI1R): Indicates whether a DEI1 (DMAC) interrupt request
is generated.
Bit 1: DEI1R
0
1
Rev.6.00 Mar. 27, 2009 Page 190 of 1036
REJ09B0254-0600
Initial value:
Interrupt Request Register 1 (IRR1)
R/W:
Bit:
Description
An interrupt request is not input to IRQ0 pin
An interrupt request is input to IRQ0 pin
Description
A DEI3 interrupt request is not generated
A DEI3 interrupt request is generated
Description
A DEI2 interrupt request is not generated
A DEI2 interrupt request is generated
Description
A DEI1 interrupt request is not generated
A DEI1 interrupt request is generated
—
R
7
0
—
R
6
0
—
R
5
0
—
R
4
0
DEI3R
R
3
0
DEI2R
R
2
0
DEI1R
R
0
1
(Initial value)
(Initial value)
(Initial value)
(Initial value)
DEI0R
R
0
0