HD6417727F100C Renesas Electronics America, HD6417727F100C Datasheet - Page 296

IC SUPERH MPU ROMLESS 240QFP

HD6417727F100C

Manufacturer Part Number
HD6417727F100C
Description
IC SUPERH MPU ROMLESS 240QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727F100C

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
100MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417727F100C
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 9 Power-Down Modes and Software Reset
Bit 6—MD5 to MD0 Pin Control (MDCHG): Specifies whether or not pins MD5 to MD0 are
switched in standby mode. When this bit is set to 1, the MD5 to MD0 pin values are latched when
returning from standby mode by means of a reset or interrupt.
Bit 6: MDCHG
0
1
Bit 5— Module Stop 8 (MSTP8): Specifies halting the clock supply to the user break controller
(UBC) in the on-chip supporting module. When the MSTP8 bit is set to 1, the clock supply to the
UBC is halted.
Bit 5: MSTP8
0
1
Bit 4—Module Stop 7 (MSTP7): Specifies halting of clock supply to the direct memory access
controller (DMAC) in the on-chip supporting module. When the MSTP7 bit is set to 1, the clock
supply to the DMAC is halted.
Bit 4: MSTP7
0
1
Bit 3—Module Stop 6 (MSTP6): Specifies halting of clock supply to the D/A converter (DAC)
in the on-chip supporting module. When the MSTP6 bit is set to 1, the clock supply to the DAC is
halted.
Bit 3: MSTP6
0
1
Bit 2—Module Stop 5 (MSTP5): Specifies halting of clock supply to the A/D converter (ADC)
in the on-chip supporting module. When the MSTP5 bit is set to 1, the clock supply to the ADC is
halted and all registers are initialized.
Rev.6.00 Mar. 27, 2009 Page 238 of 1036
REJ09B0254-0600
Description
Pins MD5 to MD0 are not switched in standby mode
Pins MD5 to MD0 are switched in standby mode
Description
UBC runs
Clock supply to UBC is halted
Description
DMAC runs
Clock supply to DMAC halted
Description
DAC runs
Clock supply to DAC halted
(Initial value)
(Initial value)
(Initial value)
(Initial value)

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