HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 166

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

5.3
This section describes the conditions for specific exception handling and the processor operations
for resets and general exceptions. For interrupts, refer to section 6, Interrupt Controller (INTC).
5.3.1
Power-On Reset:
Manual Reset:
5.3.2
CPU Address Error:
Rev. 2.00, 09/03, page 118 of 690
Conditions
Power-on reset is request
Operations
Set EXPEVT to H'000, initialize the CPU and on-chip peripheral modules, and branch to the
reset vector H'A0000000. For details, refer to the register descriptions in the relevant sections.
Conditions
Manual reset is request
Operations
Set EXPEVT to H'020, initialize the CPU and on-chip peripheral modules, and branch to the
reset vector H'A0000000. For details, refer to the register descriptions in the relevant sections.
Conditions
Types
Instruction synchronous, re-execution type
Save address
Instruction fetch: An instruction address to be fetched when an exception occurred
Data access: An instruction address where an exception occurs (a delayed branch instruction
address if an instruction is assigned to a delay slot)
Instruction is fetched from odd address (4n + 1, 4n + 3)
Word data is accessed from addresses other than word boundaries (4n + 1, 4n + 3)
Longword is accessed from addresses other than longword boundaries (4n + 1, 4n + 2,
4n + 3)
The area ranging from H'80000000 to H'FFFFFFFF in logical space is accessed in user
mode
Individual Exception Operations
Resets
General Exceptions