HD6417705F133BV Renesas Electronics America, HD6417705F133BV Datasheet - Page 158

• Manufacturer Part Number: HD6417705F133BV
• Description: MPU 3V 0K PB-FREE 208 FP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417705F133BV

• Core Processor: SH-3
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 105
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Figure 5.1 shows the bit configuration of each register.
5.1.1
TRA is assigned to address H'FFFFFFD0 and consists of the 8-bit immediate data (imm) of the
TRAPA instruction. TRA is automatically specified by the hardware when the TRAPA instruction
is executed. Only bits 9 to 2 of the TRA can be re-written using the software.
Rev. 2.00, 09/03, page 110 of 690
Bit
31 to 10
9 to 2
1, 0
TRAPA Exception Register (TRA)
Bit Name
TRA
31
31
31
31
31
Initial Value
Figure 5.1 Register Bit Configuration
0
0
0
0
R/W
R
R/W
R
TEA
12 11
12 11
12 11
10 9
Description
Reserved
These bits are always read as 0. The write value
should always be 0.
8-bit Immediate Data
Reserved
These bits are always read as 0. The write value
should always be 0.
EXPEVT
INTEVT2
INTEVT
TRA
2 1 0
0
0
0
0
0
TRA
EXPEVT
INTEVT
INTEVT2
TEA