HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 92

MCU 5V 32K PB-FREE 100-QFP

HD6473834HV

Manufacturer Part Number
HD6473834HV
Description
MCU 5V 32K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD6473834HV

Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
71
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6473834HV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6473834HV
Manufacturer:
RENESAS
Quantity:
2 120
Bit 0—Timer B Interrupt Request Flag (IRRTB)
Bit 0: IRRTB
0
1
Wakeup Interrupt Request Register (IWPR)
Note: * Only a write of 0 for flag clearing is possible.
IWPR is an 8-bit read/write register, in which the corresponding bit is set to 1 when pins WKP
WKP
automatically when an interrupt is accepted. It is necessary to write 0 to clear each flag.
Bits 7 to 0—Wakeup Interrupt Request Flags (WKPF7 to WKPF0)
Bit n: IWPFn
0
1
3.3.3
There are 13 external interrupts, WKP
Interrupts WKP
pins WKP
5 (PMR5) and falling edge input is detected, the corresponding bit in the wakeup interrupt request
register (IWPR) is set to 1, requesting an interrupt. Wakeup interrupt requests can be disabled by
clearing the IENWP bit in IENR1 to 0. It is also possible to mask all interrupts by setting the CCR
I bit to 1.
Bit
Initial value
Read/Write
0
are set to wakeup input and a pin receives a falling edge input. The flags are not cleared
External Interrupts
0
to WKP
0
IWPF7
to WKP
R/W*
7
Description
Clearing conditions:
When IRRTB = 1, it is cleared by writing 0
Setting conditions:
When the timer B counter value overflows (goes from H'FF to H'00)
Description
Clearing conditions:
When IWPFn = 1, it is cleared by writing 0 to IWPFn
Setting conditions:
IWPFn is set when pin WKP
input is detected at the pin
. When these pins are designated as WKP
7
0
7
: Interrupts WKP
IWPF6
R/W*
6
0
0
IWPF5
R/W*
to WKP
5
0
0
to WKP
7
n
and IRQ
IWPF4
is set to wakeup interrupt input, and a falling edge
R/W*
4
0
7
are requested by falling edge inputs at
0
to IRQ
IWPF3
R/W*
0
3
0
to WKP
4
.
IWPF2
R/W*
7
2
0
pins in port mode register
IWPF1
R/W*
1
0
(initial value)
(n = 7 to 0)
IWPF0
R/W*
0
0
7
to
75

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