HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 47

• Manufacturer Part Number: HD6473834HV
• Description: MCU 5V 32K PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473834HV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 71
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.5.2
Table 2.5 describes the arithmetic instructions.
Table 2.5
Instruction
ADD
SUB
ADDX
SUBX
INC
DEC
ADDS
SUBS
DAA
DAS
MULXU
DIVXU
CMP
NEG
Note: * Size: Operand size
30
B:
W:
Arithmetic Operations
Byte
Word
Arithmetic Instructions
Size*
B/W
B
B
W
B
B
B
B/W
B
Function
Rd ± Rs
Performs addition or subtraction on data in two general registers, or
addition on immediate data and data in a general register. Immediate
data cannot be subtracted from data in a general register. Word data
can be added or subtracted only when both words are in general
registers.
Rd ± Rs ± C
Performs addition or subtraction with carry or borrow on byte data in
two general registers, or addition or subtraction on immediate data and
data in a general register.
Rd ± 1
Increments or decrements a general register
Rd ± 1
Adds or subtracts immediate data to or from data in a general register.
The immediate data must be 1 or 2.
Rd decimal adjust
Decimal-adjusts (adjusts to packed 4-bit BCD) an addition or
subtraction result in a general register by referring to the CCR
Rd
Performs 8-bit
registers, providing a 16-bit result
Rd ÷ Rs
Performs 16-bit ÷ 8-bit unsigned division on data in two general
registers, providing an 8-bit quotient and 8-bit remainder
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another general
register or with immediate data, and the result is stored in the CCR.
Word data can be compared only between two general registers.
0 – Rd
Obtains the two’s complement (arithmetic complement) of data in a
general register
Rs
Rd
Rd, Rd ± 2
Rd
Rd, Rd + #IMM
Rd
Rd
Rd, Rd ± #IMM ± C
8-bit unsigned multiplication on data in two general
Rd
Rd
Rd
Rd