HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 76

MCU 5V 32K PB-FREE 100-QFP

HD6473834HV

Manufacturer Part Number
HD6473834HV
Description
MCU 5V 32K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD6473834HV

Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
71
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6473834HV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6473834HV
Manufacturer:
RENESAS
Quantity:
2 120
As a result of this operation, bit 0 in PCR3 becomes 0, making P3
and 6 in PCR3 change to 1, so that P3
To avoid this problem, store a copy of the PCR3 data in a work area in memory. Perform the bit
manipulation on the data in the work area, then write this data to PCR3.
[A: Prior to executing BCLR]
Input/output
Pin state
PCR3
PDR3
RAM0
[B: BCLR instruction executed]
[C: After executing BCLR]
Input/output
Pin state
PCR3
PDR3
RAM0
Table 2.12 lists registers that share the same address, and table 2.13 lists registers that contain
write-only bits.
MOV. B
MOV. B
MOV. B
BCLR
MOV. B
MOV. B
#0
#3F,
R0L,
R0L,
@RAM0, R0L
R0L,
P3
Input
Low
level
0
1
0
P3
Input
Low
level
0
1
0
,
7
7
R0L
@RAM0
@PCR3
@RAM0
@PCR3
P3
Input
High
level
0
0
0
P3
Input
High
level
0
0
0
6
6
7
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
The PCR3 value (H'3F) is written to a work area in memory
(RAM0) as well as to PCR3.
The BCLR instruction is executed designating the PCR3
work area (RAM0).
The work area (RAM0) value is written to PCR3.
and P3
5
5
6
change from input pins to output pins.
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
4
4
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
3
3
0
an input port. However, bits 7
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
2
2
P3
Output
Low
level
1
0
1
P3
Output
Low
level
1
0
1
1
1
P3
Output
Low
level
1
0
1
P3
Output
High
level
0
0
0
0
0
59

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