HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 531
HD64F3067RF20
Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.DF3067RF20VTR.pdf
(965 pages)
Specifications of HD64F3067RF20
Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Manufacturer
Quantity
Price
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Part Number:
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13.3
13.3.1
The SCI can carry out serial communication in two modes: asynchronous mode in which
synchronization is achieved character by character, and synchronous mode in which
synchronization is achieved with clock pulses. A smart card interface is also supported as a serial
communication function for an IC card interface.
Selection of asynchronous or synchronous mode and the transmission format for the normal serial
communication interface is made in SMR, as shown in table 13.8. The SCI clock source is
selected by the C/A bit in SMR and the CKE1 and CKE0 bits in SCR, as shown in table 13.9.
For details of the procedures for switching between LSB-first and MSB-first mode and inverting
the data logic level, see section 14.2.1, Smart Card Mode Register (SCMR).
For selection of the smart card interface format, see section 14.3.3, Data Format.
Asynchronous Mode
Synchronous Mode
Data length is selectable: 7 or 8 bits
Parity and multiprocessor bits are selectable, and so is the stop bit length (1 or 2 bits). These
selections determine the communication format and character length.
In receiving, it is possible to detect framing errors, parity errors, overrun errors, and the break
state.
An internal or external clock can be selected as the SCI clock source.
The communication format has a fixed 8-bit data length.
In receiving, it is possible to detect overrun errors.
An internal or external clock can be selected as the SCI clock source.
When an internal clock is selected, the SCI operates using the on-chip baud rate generator,
and can output a serial clock signal with a frequency matching the bit rate.
When an external clock is selected, the external clock input must have a frequency 16 times
the bit rate. (The on-chip baud rate generator is not used.)
When an internal clock is selected, the SCI operates using the on-chip baud rate generator,
and can output a serial clock signal to external devices.
When an external clock is selected, the SCI operates on the input serial clock. The on-chip
baud rate generator is not used.
Operation
Overview
Section 13 Serial Communication Interface
Rev. 4.00 Jan 26, 2006 page 507 of 938
REJ09B0276-0400
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