HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 288

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 7 DMA Controller
7.6.5
When using an internal interrupt to activate the DMAC, make sure that the interrupt selected as
the activating source does not occur during the interval after it has been selected but before the
DMAC has been enabled. The on-chip supporting module that will generate the interrupt should
not be activated until the DMAC has been enabled. If the DMAC must be enabled while the on-
chip supporting module is active, follow the procedure in figure 7.26.
If the DTE bit is set to 1 but the DTME bit is cleared to 0, the DMAC is halted and the selected
activating source cannot generate a CPU interrupt. If the DMAC is halted by an NMI interrupt, for
example, the selected activating source cannot generate CPU interrupts. To terminate DMAC
operations in this state, clear the DTE bit to 0 to allow CPU interrupts to be requested. To continue
DMAC operations, carry out steps 2 and 4 in figure 7.26 before and after setting the DTME bit to
1.
Rev. 4.00 Jan 26, 2006 page 264 of 938
REJ09B0276-0400
Interrupt hand-
ling by CPU
Note on Activating DMAC by Internal Interrupts
Figure 7.26 Procedure for Enabling DMAC while On-Chip Supporting
Yes
Clear selected interruptÕs
Set selected interruptÕs
Enabling of DMAC
Selected interrupt
DMAC operates
Enable DMAC
enable bit to 0
enable bit to 1
requested?
Module is Operating (Example)
No
1
2
3
4
1.
2.
3.
4.
While the DTE bit is cleared to 0,
interrupt requests are sent to the
CPU.
Clear the interrupt enable bit to 0
in the interrupt-generating on-chip
supporting module.
Enable the DMAC.
Enable the DMAC-activating
interrupt.