HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 286

• Manufacturer Part Number: HD64F3067RF20
• Description: IC H8 MCU FLASH 128K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3067RF20

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 7 DMA Controller
7.5
The DMAC generates only DMA-end interrupts. Table 7.13 lists the interrupts and their priority.
Table 7.13 DMAC Interrupts
Each interrupt is enabled or disabled by the DTIE bit in the corresponding data transfer control
register (DTCR). Separate interrupt signals are sent to the interrupt controller.
The interrupt priority order among channels is channel 0 > channel 1 and channel A > channel B.
Figure 7.25 shows the DMA-end interrupt logic. An interrupt is requested whenever DTE = 0 and
DTIE = 1.
The DMA-end interrupt for the B channels (DENDB) is unavailable in full address mode. The
DTME bit does not affect interrupt operations.
Rev. 4.00 Jan 26, 2006 page 262 of 938
REJ09B0276-0400
Interrupt
DEND0A
DEND0B
DEND1A
DEND1B
Interrupts
Short Address Mode
End of transfer on channel 0A
End of transfer on channel 0B
End of transfer on channel 1A
End of transfer on channel 1B
DTIE
DTE
Figure 7.25 DMA-End Interrupt Logic
Description
Full Address Mode
End of transfer on channel 0
End of transfer on channel 1
DMA-end interrupt
Interrupt Priority
High
Low