HD64F3067RF20 Renesas Electronics America, HD64F3067RF20 Datasheet - Page 379

IC H8 MCU FLASH 128K 100-QFP

HD64F3067RF20

Manufacturer Part Number
HD64F3067RF20
Description
IC H8 MCU FLASH 128K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3067RF20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Each TIOR is an 8-bit readable/writable register that selects the output compare or input capture
function for GRA and GRB, and specifies the functions of the TIORA and TIORC pins. If the
output compare function is selected, TIOR also selects the type of output. If input capture is
selected, TIOR also selects the edge or edges of the input capture signal.
TIOR is initialized to H'88 by a reset and in standby mode.
Bit 7—Reserved: This bit cannot be modified and is always read as 1.
Bits 6 to 4—I/O Control B2 to B0 (IOB2 to IOB0): These bits select the GRB function.
Bit 6
IOB2
0
1
Notes: 1. After a reset, the output conforms to the TOLR setting until the first compare match.
Bit
Initial value
Read/Write
2. Channel 2 output cannot be toggled by compare match. This setting selects 1 output
Bit 5
IOB1
0
1
0
1
instead.
Reserved bit
7
1
Bit 4
IOB0
0
1
0
1
0
1
0
1
I/O control B2 to B0
These bits select GRB functions
IOB2
R/W
6
0
Function
GRB is an output
compare register
GRB is an input
compare register
IOB1
R/W
5
0
IOB0
R/W
4
0
No output at compare match
0 output at GRB compare match *
1 output at GRB compare match *
Output toggles at GRB compare match
(1 output in channel 2) *
GRB captures rising edge of input
GRB captures falling edge of input
GRB captures both edges of input
Reserved bit
Rev. 4.00 Jan 26, 2006 page 355 of 938
3
1
IOA2
R/W
I/O control A2 to A0
These bits select GRA
functions
2
0
Section 9 16-Bit Timer
1
*
IOA1
2
R/W
REJ09B0276-0400
1
0
(Initial value)
1
1
IOA0
R/W
0
0

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