DF2367VF33V Renesas Electronics America, DF2367VF33V Datasheet - Page 874

IC H8S/2367 MCU FLASH 128QFP

DF2367VF33V

Manufacturer Part Number
DF2367VF33V
Description
IC H8S/2367 MCU FLASH 128QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheets

Specifications of DF2367VF33V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
84
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
128-QFP
For Use With
YR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
DF2367VF33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 22 Clock Pulse Generator
22.1.1
SCKCR controls φ clock output and selects operation when the frequency multiplication factor
used by the PLL circuit is changed, and the division ratio used by the divider.
Rev.6.00 Mar. 18, 2009 Page 814 of 980
REJ09B0050-0600
Bit
7
6
5, 4
3
Bit Name
PSTOP
STCS
System Clock Control Register (SCKCR)
Initial Value
0
0
All 0
0
R/W
R/W
R/W
R/W
Description
φ Clock Output Disable
Controls φ output.
Normal Operation
0: φ output
1: Fixed high
Sleep Mode
0: φ output
1: Fixed high
Software Standby Mode
0: Fixed high
1: Fixed high
Hardware Standby Mode
0: High impedance
1: High impedance
All module clock stop mode
0: φ output
1: Fixed high
Reserved
Though this bit can be read from or written to, the
write value should always be 0.
Reserved
These bits are always read as 0 and cannot be
modified.
Frequency Multiplication Factor Switching Mode
Select
Selects the operation when the PLL circuit
frequency multiplication factor is changed.
0: Specified multiplication factor is valid after
transition to software standby mode
1: Specified multiplication factor is valid immediately
after STC1 and STC0 bits are rewritten

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