DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 639
DF2161BVTE10
Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet
1.DF2160BVT10V.pdf
(847 pages)
Specifications of DF2161BVTE10
Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
HD64F2161BVTE10
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20.5
When this LSI enters software standby mode with D/A conversion enabled, the D/A output is
retained, and the analog power supply current is equal to as during D/A conversion. If the analog
power supply current needs to be reduced in software standby mode, clear the DAOE1, DAOE0,
and DAE bits all to 0 to disable D/A output.
20.5.1
D/A converter operation can be enabled or disabled using the module stop control register. The
initial setting is for D/A converter operation to be halted. Register access is enabled by canceling
module stop mode. For details, refer to section 26, Power-Down Modes.
Legend:
t
Usage Note
Address
DADR0
DAOE0
DA 0
DCONV
Module Stop Mode Setting
: D/A conversion time
DADR0
write cycle
High impedance state
Figure 20.2 D/A Converter Operation Example
DACR
write cycle
Conversion data (1)
t
DCONV
Conversion result (1)
Rev. 3.00 Mar 21, 2006 page 583 of 788
DADR0
write cycle
t
DCONV
Conversion data (2)
Section 20 D/A Converter
Conversion
result (2)
DACR
write cycle
REJ09B0300-0300
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