DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 467

MCU 3V 128K 144-TQFP

DF2161BVTE10

Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2161BVTE10

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
15.9.8
When SCK pins are switched to port pins after transmission has completed, pins are enabled for
port output after outputting a low pulse of half a cycle as shown in figure 15.28.
To prevent the low pulse output that is generated when switching the SCK pins to the port pins,
specify the SCK pins for input (pull up the SCK/port pins externally), and follow the procedure
below with DDR = 1, DR = 1, C/A = 1, CKE1 = 0, CKE1 = 0, and TE = 1.
1. End serial data transmission
2. TE bit = 0
3. CKE1 bit = 1
4. C/A bit = 0 (switch to port output)
5. CKE1 bit = 0
Figure 15.29 Prevention of Low Pulse Output at Switching from SCK Pins to Port Pins
SCK/Port
Data
TE
C/A
CKE1
CKE0
SCK/Port
Data
TE
C/A
CKE1
CKE0
Notes on Switching from SCK Pins to Port Pins
Bit 6
Bit 6
Figure 15.28 Switching from SCK Pins to Port Pins
Bit 7
Bit 7
1. Transmission end
1. Transmission end
Section 15 Serial Communication Interface (SCI and IrDA)
2. TE = 0
2. TE = 0
3. CKE1 = 1
3. C/A = 0
Rev. 3.00 Mar 21, 2006 page 411 of 788
4. Low pulse output
Low pulse of half a cycle
4. C/A = 0
High output
5. CKE1 = 0
REJ09B0300-0300

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