DF2161BVTE10 Renesas Electronics America, DF2161BVTE10 Datasheet - Page 563

MCU 3V 128K 144-TQFP

DF2161BVTE10

Manufacturer Part Number
DF2161BVTE10
Description
MCU 3V 128K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2161BVTE10

Core Processor
H8S/2000
Core Size
16-Bit
Speed
10MHz
Connectivity
Host Interface (LPC), I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
114
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2161BVTE10
HD64F2161BVTE10
17.4.8
In this device, clearing the KBFSEL bit to 0 in KBCRH enables the KBF bit in KBCRL to be used
as a flag for the interrupt generated by the fall of KCLK input.
Figure 17.13 shows the setting method and an example of operation.
Note: * The KBF setting timing is the same as the timing of KBF setting and KCLK automatic I/O inhibit bit
(interrupt generated)
interrupts enabled)
(KCLK falling edge
Interrupt handling
(KBBR reception
KCLK Fall Interrupt Operation
generation in figure 17.11. When the KBF bit is used as the KCLK input fall interrupt flag, the
automatic I/O inhibit function does not operate.
fall detected?
KBFSEL = 0
Set KBIOE
Clear KBF
KCLK pin
disabled)
KBIE = 1
KBE = 0
KBF = 1
Start
Figure 17.13 Example of KCLK Input Fall Interrupt Operation
Yes
No
KCLK
(pin state)
KBF bit
Interrupt
generated
Rev. 3.00 Mar 21, 2006 page 507 of 788
Section 17 Keyboard Buffer Controller
Cleared
by software
REJ09B0300-0300
Interrupt
generated

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