R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 643
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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13.2
This section describes the output priority of each pin.
The name of each peripheral module pin is followed by "_OE". This (for example: TIOCA4_OE)
indicates whether the output of the corresponding function is valid (1) or if another setting is
specified (0). Table 13.5 lists each port output signal's valid setting. For details on the
corresponding output signals, see the register description of each peripheral module. If the name
of each peripheral module pin is followed by A or B, the pin function can be modified by the port
function control register (PFCR). For details, see section 13.3, Port Function Controller.
For a pin whose initial value changes according to the activation mode, "initial value E" indicates
the initial value when the LSI is started up in external extended mode and "initial value S"
indicates the initial value when the LSI is started in single-chip mode.
13.2.1
(1)
The pin function is switched as shown below according to the combination of the EXDMAC and
IIC2 register settings and P17DDR bit setting.
Module Name
EXDMAC
IIC2
I/O port
P17/IRQ7-A/TCLKD-B/SCL0/EDRAK1 /ADTRG1
Output Buffer Control
Port 1
Pin Function
EDRAK1 output
SCL0 input/output
P17 output
P17 input
(initial value)
EXDMAC
EDRAK1_OE
1
0
0
0
SCL0_OE
1
0
0
IIC2
Rev. 2.00 Sep. 24, 2008 Page 609 of 1468
Setting
I/O Port
P17DDR
1
0
Section 13 I/O Ports
REJ09B0412-0200
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