R5F61663RN50FPV Renesas Electronics America, R5F61663RN50FPV Datasheet - Page 487
![MCU FLASH 384K ROM 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R5F61663RN50FPV
Manufacturer Part Number
R5F61663RN50FPV
Description
MCU FLASH 384K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Specifications of R5F61663RN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61663RN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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This LSI has an on-chip four-channel external bus transfer DMA controller (EXDMAC). The
EXDMAC can carry out high-speed data transfer, in place of the CPU, to and from external
devices and external memory. Also, the EXDMAC allows external bus transfer in parallel with the
internal CPU operation when there is no external bus request from a controller other than the
EXDMAC.
11.1
• Up to 4-Gbyte address space accessible
• Selection of byte, word, or longword transfer data length
• Total transfer size of up to 4 Gbytes (4,294,967,295 bytes)
• Selection of auto-requests or external requests for activating the EXDMAC
• Selection of dual address mode or single address mode
• Normal, repeat, block, or cluster transfer (only for the EXDMAC) can be selected as transfer
Selection of free-running mode (with no total transfer size specified)
Auto-request: Activation from the CPU (Cycle steal mode or burst mode can be selected.)
External request: Low level sensing or falling edge sensing for the EDREQ signal can be
selected.
All of four channels can accept external requests.
Dual address mode: Both the transfer source and destination addresses are specified to transfer
data.
Single address mode: The EDACK signal is used to access the transfer source or destination
peripheral device and the address of the other device is specified to transfer data.
mode
Normal transfer mode: One byte, one word, or one longword data is transferred at a single
Repeat transfer mode:
Block transfer mode:
Features
Section 11 EXDMA Controller (EXDMAC)
transfer request
transfer request
Repeat size of data is transferred and then a transfer address returns to
the transfer start address
Up to 64-kbyte transfers can be set as repeat size (65,536
bytes/words/longwords)
One block data is transferred at a single transfer request
Up to 64-kbyte data can be set as block size (65,536
bytes/words/longwords)
One byte, one word, or one longword data is transferred at a single
Rev. 2.00 Sep. 24, 2008 Page 453 of 1468
Section 11 EXDMA Controller (EXDMAC)
REJ09B0412-0200
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