R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 693
![MCU 256K FLASH 48K 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R4F24268NVFQV
Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet
1.R4F24268NVZFQV.pdf
(1406 pages)
Specifications of R4F24268NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Price
Company:
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
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Company:
Part Number:
R4F24268NVFQV
Manufacturer:
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H8S/2426, H8S/2426R, H8S/2424 Group
• PF2/LCAS*
• Modes 1, 2, 4, and 7 (EXPE = 1)
• Mode 7 (EXPE = 0)
Notes: 1. IRQ15 input when the ITS15 bit in ITSR is 0.
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Areas 2 to 5
SSU settings
PF2DDR
Pin function
Areas 2 to 5
SSU settings
PF2DDR
Pin function
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, bits MSS and BIDE in SSCRH, bit SSUMS in SSCRL, and bits TE and RE
in SSER of the SSU, bits RMTS2 to RMTS0 in DRAMCR*
to ABW2 in ABWCR, bits SSI0S1 and SSI0S0 in PFCR5, and bit PF2DDR.
2. SSI0-C input when SSI0S1 and SSI0S0 = B'10 in PFCR5.
3. SSI0-C output when SSI0S1 and SSI0S0 = B'10 in PFCR5.
4. Not supported in the H8S/2426 Group.
5. Not supported in the 5-V version.
5
/DQML*
synchronous DRAM
space area is 16-bit
DQML*
LCAS*
Any DRAM/
PF2 input
bus space
4
/IRQ15-A/SSI0-C (H8S/2426 Group and H8S/2426R Group)
0
⎯
⎯
5
4
(1) in table below
output
output
PF2 input
PF2 output
8-bit bus space, or areas 2 to 5 are all normal space
(1) in table below
0
IRQ15-A interrupt input*
IRQ15-A interrupt input*
All DRAM/synchronous DRAM space areas are
1
PF2 output SSI0-C input*
⎯
1
(2) in table below
SSI0-C input*
5
of the bus controller, bits ABW5
0
(2) in table
1
1
below
0
2
2
(3) in table below
SSI0-C output*
Section 10 I/O Ports
SSI0-C output*
(3) in table
Page 663 of 1372
below
⎯
⎯
3
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