R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 537

MCU 256K FLASH 48K 144-LQFP

R4F24268NVFQV

Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24268NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
Section 10 I/O Ports
Section 10 I/O Ports
Table 10.1 summarizes the port functions of the H8S/2426 Group and H8S/2426R Group. Table
10.2 summarizes the port functions of the H8S/2424 Group. The pins of each port also have other
functions such as input/output or external interrupt input pins of on-chip peripheral modules. Each
I/O port includes a data direction register (DDR) that controls input/output, a data register (DR)
that stores output data, a port register (PORT) used to read the pin states, and a port function
control register (PFCR) used to set input/output destination. Before enabling each input/output
pins, select the input/output destination by PFCR. The input-only ports do not have a DR or DDR
register.
Ports A to E have a built-in pull-up MOS function and a pull-up MOS control register (PCR) to
control the on/off state of the input pull-up MOS.
Ports 1 to 3, 5 to 8, and A to J include an open-drain control register (ODR) that controls the
on/off state of the output buffer PMOS.
Ports 1 to 3 and 5 to 8 can drive a single TTL load and 30-pF capacitive load. Ports A to J can
drive a single TTL load and 50-pF capacitive load.
All of the I/O ports can drive a Darlington transistor when outputting data.
Ports 1 and 2 are Schmitt-triggered inputs. The other ports are Schmitt-triggered inputs when used
as IRQ inputs, 16-bit timer pulse unit (TPU) inputs, 8-bit timer (TMR) inputs, and I
2
C bus
interface (IIC) inputs.
REJ09B0466-0350 Rev. 3.50
Page 507 of 1372
Jul 09, 2010

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