R4F24268NVFQV Renesas Electronics America, R4F24268NVFQV Datasheet - Page 1055

MCU 256K FLASH 48K 144-LQFP

R4F24268NVFQV

Manufacturer Part Number
R4F24268NVFQV
Description
MCU 256K FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheet

Specifications of R4F24268NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
R4F24268NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
H8S/2426, H8S/2426R, H8S/2424 Group
17.7.9
When operating two A/D converters concurrently, if conversion by the two converters starts at
different times, the accuracy of conversion may be affected by crosstalk between the two
converters.
When converter Y starts A/D conversion during the period indicated by T
after the start of A/D conversion by converter X, and conversion by converter X is completed
while conversion by converter Y is still in progress, the accuracy of A/D conversion may not be
guaranteed.
When operating two A/D converters concurrently, be sure to conduct adequate evaluation in
advance.
Note: X and Y in "converter X" and "converter Y" indicate either pair of 0 and 1.
Table 17.10 Difference in Time When A/D Conversion Starts (T
REJ09B0466-0350 Rev. 3.50
Jul 09, 2010
Figure 17.13 An Example of Timing Where Accuracy of A/D Conversion is not Guaranteed
T
0 to 10
X-Y
Converter Y
ADST
Converter X
ADST
ANn
in operation
Concurrent Operation of Two A/D Converters
[Legend]
ANn: Operating channel of converter Y
T
t
SPL
X-Y
Wait for conversion
: Input sampling time
: Difference in time when A/D conversion starts
T
X-Y
t
SPL
Unit
ADCLK cycles
A/D conversion
X-Y
) in Figure 17.13
X-Y
in figure 17.13 below
Wait for conversion
Section 17 A/D Converter
Page 1025 of 1372

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