HD64F2218TF24 Renesas Electronics America, HD64F2218TF24 Datasheet - Page 230

• Manufacturer Part Number: HD64F2218TF24
• Description: IC H8S MCU FLASH 128K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2200r

Specifications of HD64F2218TF24

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: SCI, SmartCard, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• For Use With: 3DK2218-SS - KIT DEV H8S/2218 WINDOWS SIDESHW
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Rev.7.00 Dec. 24, 2008 Page 174 of 698
REJ09B0074-0700
Bit Bit Name Initial Value R/W
8
7
–
DTME1
0
0
R/W
R/W
Description
Reserved
Although this bit is readable/writable, only 0 should be written
to.
Data Transfer Master Enable
Together with the DTE bit, this bit controls enabling or
disabling of data transfer on the relevant channel. When both
the DTME bit and the DTE bit are set to 1, transfer is enabled
for the channel. If the relevant channel is in the middle of a
burst mode transfer when an NMI interrupt is generated, the
DTME bit is cleared, the transfer is interrupted, and bus
mastership passes to the CPU. When the DTME bit is
subsequently set to 1 again, the interrupted transfer is
resumed. In block transfer mode, however, the DTME bit is
not cleared by an NMI interrupt, and transfer is not
interrupted.
The conditions for the DTME bit being cleared to 0 are as
follows:
•
•
•
The condition for DTME being set to 1 is as follows:
•
Data Transfer Master Enable 1
Enables or disables data transfer on channel 1
0: Data transfer disabled. In burst mode, cleared to 0 by an
1: Data transfer enabled
NMI interrupt
When initialization is performed
When NMI is input in burst mode
When 0 is written to the DTME bit
When 1 is written to DTME after DTME is read as 0