MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 466

• Manufacturer Part Number: MC68HC16Z1CEH16
• Description: IC MCU 16BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Controller Family/series: 68HC16
• No. Of I/o's: 26
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

*****
START:
***** Exceptions/Interrupts
BDM:
E.2.1.2 Example 2 - Using Chip-Selects
*
*
*
*
*
*
*
*
*
*
****************************************************************************
addresses
*****
INIT:
COP
CSINIT:
E-14
Main Loop
Initialization
STAB DDRF
LDAB #$01
LDAA #$00
STAB PORTF0
STAA PORTF0
BRA
BGND
Description : Demo of how to set up the U1 and U3 RAM slots with
INCLUDE
INCLUDE
INCLUDE
INCLUDE
INCLUDE
INCLUDE
LDD
STD
STD
LDD
STD
ORG
START
#$0303
CSBAR0
CSBAR1
#$5030
CSOR0
*****
INITIALIZATION AND PROGRAMMING EXAMPLES
$0200
Freescale Semiconductor, Inc.
two 32Kx8 RAM chips using the Chip Selects.
memory will start at address $30000 and will be both
byte and word readable/writable.
This program assumes that the RAM to be installed
(such as MCM60L256AP85 or MCM6206P85) have
access times of 85 ns and require no wait states.
The DSACK field of the Chip Select Option Registers
may need to be adjusted for chips that have faster or
slower access times.
For More Information On This Product,
'EQUATES.ASM'
'ORG00000.ASM'
'ORG00008.ASM'
*****
'INITSYS.ASM'
'INITRAM.ASM'
'INITSCI.ASM'
;Port F pins 0-7 as outputs (force 3-7 to 0)
;store counter into Port E data register
;load A register with Port F data register
;go back and start the counting again at zero
;exception vectors point here
;and will put user into background mode
*****
Go to: www.freescale.com
;Initialization stuff.....
;Initialize the Chip Selects.....
;set U1 RAM base addr to $30000: bank 3, 64k
;set U3 RAM base addr to $30000: bank 3, 64k
;set Chip Select 0, upper byte, write only
;table of EQUates for common register
;initialize reset vector
;initialize exception vector table
;start program right after vector table
;initially set EK=F, XK=0, YK=0, ZK=0
;set sys clock at 16.78 MHz, disable
;turn on 1k internal SRAM at $10000
;set stack in bank 1 (SK=1, SP=03FE)
;set SCI baud rate at 9600 baud
;enable SCI transmitter and receiver
M68HC16 Z SERIES
USER’S MANUAL
The new