MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 387

• Manufacturer Part Number: MC68HC16Z1CEH16
• Description: IC MCU 16BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Controller Family/series: 68HC16
• No. Of I/o's: 26
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

HME — Halt Monitor Enable
BME — Bus Monitor External Enable
BMT[1:0] — Bus Monitor Timing
D.2.13 Periodic Interrupt Control Register
PICR — Periodic Interrupt Control Register
PIRQL[2:0] — Periodic Interrupt Request Level
M68HC16 Z SERIES
USER’S MANUAL
15
0
0
RESET:
The following equation calculates the time-out period for an externally input clock fre-
quency on both slow and fast reference frequency devices, when f
system clock frequency.
This field selects the bus monitor time-out period. Refer to
PICR sets the interrupt level and vector number for the periodic interrupt timer (PIT).
Bits [10:0] can be read or written at any time. Bits [15:11] are unimplemented and al-
ways read zero.
This field determines the priority of periodic interrupt requests. A value of %000 dis-
ables PIT interrupts.
0 = Halt monitor is disabled.
1 = Halt monitor is enabled.
0 = Disable bus monitor for external bus cycles.
1 = Enable bus monitor for external bus cycles.
14
0
0
Time-out Period
13
0
0
Time-out Period
12
0
0
Table D-7 Bus Monitor Time-Out Period
Freescale Semiconductor, Inc.
11
0
0
For More Information On This Product,
BMT[1:0]
=
00
01
10
11
10
0
------------------------------------------------------------------------------------------------------------------------------- ------------ -
128 Divide Ratio Specified by SWP and SWT[1:0]
=
PIRQL[2:0]
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REGISTER SUMMARY
Divide Ratio Specified by SWP and SWT[1:0]
----------------------------------------------------------------------------------------------------------------------- -
9
0
Bus Monitor Time-Out Period
8
0
64 system clocks
32 system clocks
16 system clocks
8 system clocks
7
0
6
0
f
f
sys
ref
5
0
Table
4
0
PIV[7:0]
D-7.
3
1
sys
is equal to the
2
1
$YFFA22
1
1
D-13
0
1