MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 439

IC MCU 16BIT 16MHZ 132-PQFP

MC68HC16Z1CEH16

Manufacturer Part Number
MC68HC16Z1CEH16
Description
IC MCU 16BIT 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CEH16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Processor Series
HC16Z
Core
CPU16
Data Bus Width
16 bit
Controller Family/series
68HC16
No. Of I/o's
26
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
QSPI, SCI
Rohs Compliant
Yes
Package
132PQFP
Family Name
HC16
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Number Of Programmable I/os
16
On-chip Adc
8-chx10-bit
Number Of Timers
11
Data Ram Size
1 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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SIZE — Transfer Data Size
SPBR[7:0] — Serial Clock Baud Rate
D.7.14 SPI Status Register
SPSR — SPI Status Register
SPIF — SPI Finished Flag
WCOL — Write Collision
M68HC16 Z SERIES
USER’S MANUAL
SPIF
15
0
RESET:
The SPI uses a modulus counter to derive the SCK baud rate from the MCU system
clock. Baud rate is selected by writing a value from 2 to 255 into SPBR[7:0].
The following expressions apply to SCK baud rate:
Giving SPBR[7:0] a value of zero or one disables SCK (disable state determined by
CPOL). At reset, the SCK baud rate is initialized to one-eighth of the system clock
frequency.
SPSR contains information concerning the current serial transmission. Only the SPI
can set bits in SPSR. The CPU16 reads SPSR to obtain SPI status information and
writes it to clear status flags.
Clearing WCOL is accomplished by reading the SPSR while WCOL is set and then
either reading the SPDR prior to SPIF being set, or reading or writing the SPDR after
SPIF is set.
WCOL
0 = 8-bit data transfer.
1 = 16-bit data transfer.
0 = SPI is not finished.
1 = SPI is finished.
0 = No attempt to write to the SPDR happened during the serial transfer.
1 = Write collision occurred.
14
0
13
0
0
MODF
12
0
Freescale Semiconductor, Inc.
11
0
0
For More Information On This Product,
SPBR[7:0]
10
0
0
SCK Baud Rate
Go to: www.freescale.com
REGISTER SUMMARY
9
0
0
=
------------------------------------------------------------------------- -
2 SCK Baud Rate Desired
8
0
0
or
7
0
0
=
------------------------------------ -
2 SPBR[7:0]
6
0
0
f
sys
f
sys
5
0
0
4
0
0
3
0
0
2
0
0
$YFFC3C
1
0
0
D-65
0
0
0

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