MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 244

IC MCU 16BIT 16MHZ 132-PQFP

MC68HC16Z1CEH16

Manufacturer Part Number
MC68HC16Z1CEH16
Description
IC MCU 16BIT 16MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
HC16r
Datasheets

Specifications of MC68HC16Z1CEH16

Core Processor
CPU16
Core Size
16-Bit
Speed
16MHz
Connectivity
EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Processor Series
HC16Z
Core
CPU16
Data Bus Width
16 bit
Controller Family/series
68HC16
No. Of I/o's
26
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
2
Embedded Interface Type
QSPI, SCI
Rohs Compliant
Yes
Package
132PQFP
Family Name
HC16
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Number Of Programmable I/os
16
On-chip Adc
8-chx10-bit
Number Of Timers
11
Data Ram Size
1 KB
Interface Type
SCI, SPI, UART
Maximum Clock Frequency
16 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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10.2.2 Pin Control and General-Purpose I/O
10.3 Serial Peripheral Interface (SPI)
10-4
Select a value for INTV so that each MCCI interrupt vector corresponds to one of the
user-defined vectors ($40–$FF). Refer to the CPU16 Reference Manual (CPU16RM/
AD) for additional information on interrupt vectors.
The eight pins used by the SPI and SCI subsystems have alternate functions as gen-
eral-purpose I/O pins. Configuring the MCCI submodule includes programming each
pin for either general-purpose I/O or its serial interface function. In either function,
each pin must also be programmed as input or output.
The MCCI data direction register (MDDR) assigns each MCCI pin as either input or
output. The MCCI pin assignment register (MPAR) assigns the MOSI, MISO, and SS
pins as either SPI pins or general-purpose I/O. (The fourth pin, SCK, is automatically
assigned to the SPI whenever the SPI is enabled, for example, when the SPE bit in
the SPI control register is set.) The receiver enable (RE) and transmitter enable (TE)
bits in the SCI control registers (SCCR0A, SCCR0B) automatically assign the associ-
ated pin as an SCI pin when set or general-purpose I/O when cleared.
summarizes how pin function and direction are assigned.
The SPI submodule communicates with external peripherals and other MCUs via a
synchronous serial bus. The SPI is fully compatible with the serial peripheral interface
systems found on othe Freescale devices, such as the M68HC11 and M68HC05 fam-
ilies. The SPI can perform full duplex three-wire or half duplex two-wire transfers. Se-
rial transfer of eight or sixteen bits can begin with the MSB or LSB. The system can be
configured as a master or slave device.
Figure 10-2
shows a block diagram of the SPI.
TXDA/PMC7
RXDA/PMC6
TXDB/PMC5
RXDB/PMC4
MOSI/PMC1
MISO/PMC0
SCK/PMC2
SS/PMC3
Pin
MULTICHANNEL COMMUNICATION INTERFACE
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 10-2 Pin Assignments
Function Assigned By
Go to: www.freescale.com
RE bit in SCCR0A
RE bit in SCCR0B
MOSI bit in MPAR
MISO bit in MPAR
TE bit in SCCR0A
TE bit in SCCR0B
SPE bit in SPCR
SS bit in MPAR
Direction Assigned By
MMDR7
MMDR6
MMDR5
MMDR4
MMDR3
MMDR2
MMDR1
MMDR0
M68HC16 Z SERIES
USER’S MANUAL
Table 10-2

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