MC68HC16Z1CEH16 Freescale Semiconductor, MC68HC16Z1CEH16 Datasheet - Page 398

• Manufacturer Part Number: MC68HC16Z1CEH16
• Description: IC MCU 16BIT 16MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: HC16r

Specifications of MC68HC16Z1CEH16

• Core Processor: CPU16
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Processor Series: HC16Z
• Core: CPU16
• Data Bus Width: 16 bit
• Controller Family/series: 68HC16
• No. Of I/o's: 26
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 2
• Embedded Interface Type: QSPI, SCI
• Rohs Compliant: Yes
• Package: 132PQFP
• Family Name: HC16
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 16
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 11
• Data Ram Size: 1 KB
• Interface Type: SCI, SPI, UART
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

D.3.2 RAM Test Register
RAMTST — RAM Test Register
D.3.3 Array Base Address Register High
RAMBAH — Array Base Address Register High (Z1, Z2, Z3, and Z4)
D.3.4 Array Base Address Register Low
RAMBAL — Array Base Address Register Low (1K SRAM — Z1/Z4)
RAMBAL — Array Base Address Register Low (2K SRAM — Z2)
RAMBAL — Array Base Address Register Low (4K SRAM — Z3)
D-24
RESET:
RESET:
RESET:
RESET:
ADDR
ADDR
ADDR
15
15
15
15
15
15
15
0
0
0
Used for factory test only.
RAMBAH and RAMBAL specify the SRAM array base address in the system memory
map. They can only be written while the SRAM is in low-power stop mode (STOP = 1,
the default out of reset) and the base address lock is disabled (RLCK = 0, the default
out of reset). This prevents accidental remapping of the array. Because the CPU16
drives ADDR[23:20] to the same logic level as ADDR19, the values of RAMBAH
ADDR[23:20] must match the value of ADDR19 for the array to be accessible. These
registers may be read at any time. RAMBAH[15:8] are unimplemented and will always
read zero.
ADDR
ADDR
ADDR
14
14
14
14
14
14
0
0
0
ADDR
ADDR
ADDR
13
13
13
13
13
13
0
0
0
ADDR
ADDR
ADDR
NOT USED
12
12
12
12
12
12
0
0
0
Freescale Semiconductor, Inc.
ADDR
ADDR
ADDR
11
11
11
11
11
11
For More Information On This Product,
0
0
ADDR
ADDR
ADDR
10
10
10
10
10
10
0
Go to: www.freescale.com
REGISTER SUMMARY
ADDR
ADDR
ADDR
9
9
9
9
9
9
ADDR
ADDR
ADDR
8
8
8
8
8
8
8
ADDR
ADDR
ADDR
ADDR
23
7
0
7
7
7
7
7
7
ADDR
ADDR
ADDR
ADDR
22
6
0
6
6
6
6
6
6
ADDR
ADDR
ADDR
ADDR
21
5
0
5
5
5
5
5
5
ADDR
ADDR
ADDR
ADDR
20
4
0
4
4
4
4
4
4
ADDR
ADDR
ADDR
ADDR
19
3
0
3
3
3
3
3
3
M68HC16 Z SERIES
ADDR
ADDR
ADDR
ADDR
USER’S MANUAL
18
2
0
2
2
2
2
2
2
$YFFB02
$YFFB04
$YFFB06
$YFFB06
$YFFB06
ADDR
ADDR
ADDR
ADDR
17
1
0
1
1
1
1
1
1
ADDR
ADDR
ADDR
ADDR
16
0
0
0
0
0
0
0
0