ST10F168SQ6 STMicroelectronics, ST10F168SQ6 Datasheet - Page 8

• Manufacturer Part Number: ST10F168SQ6
• Description: MCU 256KB FLASH 12K RAM 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F168SQ6

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-MQFP, 144-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST10F168
Table 1 : Pin Description (continued)
8/74
P0H.1 - P0H.7
P0L.0 - P0L.7
P4.0 - P4.7
WR/WRL
Symbol
READY/
READY
P0H.0
ALE
RD
EA
100 - 107,
111 - 117
85-92
85-89
108,
Pin
90
91
92
95
96
97
98
99
Type
I/O
I/O
O
O
O
O
O
O
O
O
I
I
I
8-bit bidirectional I/O port, bit-wise programmable for input or output via direction bit.
Programming an I/O pin as input forces the corresponding output driver to high
impedance state. For external bus configuration, Port 4 can be used to output the
segment address lines:
P4.0-P4.4 A16-A20
P4.5
P4.6
P4.7
External Memory Read Strobe. RD is activated for every external instruction or data
read access.
External Memory Write Strobe. In WR-mode this pin is activated for every external
data write access. In WRL mode this pin is activated for low Byte data write
accesses on a 16-bit bus, and for every data write access on an 8-bit bus. See
WRCFG in the SYSCON register for mode selection.
Ready Input. The active level is programmable. When the Ready function is
enabled, the selected inactive level at this pin, during an external memory access,
will force the insertion of wait state cycles until the pin returns to the selected active
level.
Address Latch Enable Output. In case of use of external addressing or of multi-
plexed mode, this signal is the latch command of the address lines.
External Access Enable pin. A low level at this pin during and after Reset forces the
ST10F168 to start the program from the external memory space. A high level forces
the ST10F168 to start in the internal memory space.
Two 8-bit bidirectional I/O ports P0L and P0H, bit-wise programmable for input or
output via direction bit. Programming an I/O pin as input forces the corresponding
output driver to high impedance state.
In case of an external bus configuration, Port0 serves as the address (A) and as the
address / data (AD) bus in multiplexed bus modes and as the data (D) bus in demul-
tiplexed bus modes.
Demultiplexed bus modes
Multiplexed bus modes
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
Data Path Width:
P0L.0 – P0L.7:
P0H.0 – P0H.7:
A21
CAN_RxD
A22
CAN_TxD
A23
8-bit
AD0 – AD7
A8 – A15
8-bit
D0 – D7
I/O
Segment Address Line
Segment Address Line
CAN Receiver Data Input
Segment Address Line
CAN Transmitter Data Output
Most Significant Segment Addrress Line
Function
16-bit
D0 - D7
D8 - D15
16-bit
AD0 - AD7
AD8 – AD15