ST10F168SQ6 STMicroelectronics, ST10F168SQ6 Datasheet - Page 26

• Manufacturer Part Number: ST10F168SQ6
• Description: MCU 256KB FLASH 12K RAM 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F168SQ6

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-MQFP, 144-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST10F168
9 - CAPTURE / COMPARE (CAPCOM) UNIT
The ST10F168 has two 16 channel CAPCOM
units which support generation and control of
timing sequences on up to 32 channels with a
maximum resolution of 320ns at 32MHz CPU
clock.
The CAPCOM units are typically used to handle
high speed I/O tasks such as pulse and waveform
generation, pulse width modulation (PMW), Digital
to Analog (D/A) conversion, software timing, or
time recording relative to external events.
Four 16-bit timers (T0/T1, T7/T8) with reload
registers provide two independent time bases for
the capture / compare register array.
The input clock for the timers is programmable to
several prescaled values of the internal system
clock, or may be derived from an overflow / under-
flow of timer T6 in module GPT2.
This provides a wide range of variation for the
timer period and resolution and allows precise
adjustments to application specific requirements.
In addition, external count inputs for CAPCOM
timers T0 and T7 allow event scheduling for the
capture / compare registers relative to external
events.
Each of the two capture / compare register arrays
contain 16 dual purpose capture / compare regis-
ters, each of which may be individually allocated
to either CAPCOM timer T0 or T1 (T7 or T8,
respectively),
or compare functions. Each register has one
associated port pin which serves as an input pin
for triggering the capture function, or as an output
Table 11 : Compare Modes
26/74
Double Register Mode Two registers operate on one pin; pin toggles on each compare match ; several compare
Compare Modes
Mode 0
Mode 1
Mode 2
Mode 3
and
programmed
Interrupt-only compare mode ; several compare interrupts per timer period are possible.
Pin toggles on each compare match ; several compare events per timer period are possible.
Interrupt-only compare mode ; only one compare interrupt per timer period is generated.
Pin set ‘1’ on match; pin reset ‘0’ on compare time overflow ; only one compare event per
timer period is generated.
events per timer period are possible.
for capture
pin (except for CC24...CC27) to indicate the
occurrence of a compare event.
When a capture / compare register has been
selected for capture mode, the current contents of
the allocated timer will be latched (captured) into
the dedicated capture / compare register in
response
corresponding port pin which is associated with
this register. In addition, a specific interrupt
request for this capture / compare register is
generated.
Either a positive, a negative, or both a positive
and a negative external signal transition at the pin
can be selected as the triggering event.
The contents of all the registers which have been
selected for one of the five compare modes are
continuously compared with the contents of the
allocated timers.
When a match occurs between the timer value
and the value in a capture / compare register, spe-
cific actions will be taken based on the selected
compare mode.
The input frequencies f
selector Txl, are determined as a function of the
CPU clock. The timer input frequencies, the reso-
lution and the periods which result from the
selected pre-scaler option in TxI when using a
25MHz CPU clock are listed in the Table 12.
The numbers of the timer periods are based on a
reload value of 0000h. Note that some numbers
are rounded to 3 significant figures.
Function
to
an
external
Tx
, for the timer input
event
at
the