ST10F168SQ6 STMicroelectronics, ST10F168SQ6 Datasheet - Page 16

• Manufacturer Part Number: ST10F168SQ6
• Description: MCU 256KB FLASH 12K RAM 144-TQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F168SQ6

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-MQFP, 144-PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

ST10F168
5.2 - Programming Examples
Programming a double Word
; code shown below assumes that Flash is mapped in segment 1
; ie. bit ROMS1 = ‘1’ in SYSCON register
; Flash must be enabled, ie. bit ROMEN = ‘1’ in SYSCON.
MOV
OR
MOV
MOV
MOV
MOV
MOV
#define FCR 08000h
; Flash Unlock Sequence consists in two consecutive writes, with the direct
addressing mode and then the indirect addressing mode. FCR must represent an
even address in the active address space of the Flash memory, and Rwn can be
any unused Word GPR (R6 to R15)loaded with a value resulting in the same even
address than FCR
EXTS
MOV
MOV
NOP
NOP
Note: For easier coding, the standard data paging addressing scheme is overriden for the two MOV
16/74
instructions of the Flash Trigger Sequence (EXTS instruction). However this coding also locks
both standard and PEC interrupts and class A hardware traps. This override can be replaced by
an ATOMIC instruction if the standard DPP addressing scheme must be preserved.
R0, #0DD40h
R0, #01h
R1, #00224h
R2, #03456h
R3, #04567h
R4, #050d
R7, #08000h
#1, #2
FCR, R7
[R7], R7
; DD4xh : Double Word programming command
; Selects segment 1 in flash memory
; Address to be programmed is 01’0224h
; Data to be programmed at 01’0224h
; Data to be programmed at 01’0226h
; 50ns is 20MHz CPU clock frequency
; R7 used for Flash trigger sequence
; Flash can be mapped in segment 0 or 1
; first part
; second part
; WARNING: place 2 NOP operations after
; the Unlock sequence to avoid all possible
; pipeline conflicts in STEAK programs