PIC18F4431-E/PT Microchip Technology, PIC18F4431-E/PT Datasheet - Page 249

• Manufacturer Part Number: PIC18F4431-E/PT
• Description: IC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F4431-E/PT

• Core Size: 8-Bit
• Program Memory Size: 16KB (8K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 36
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 768Byte
• Cpu Speed: 40MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 20-4:
 2003 Microchip Technology Inc.
bit 7-6
bit 5
bit 4:0
bit 7
ADCON3: A/D CONTROL REGISTER 3
ADRS<1:0>: A/D Result Buffer Depth Interrupt Select Control bits for Continuous Loop mode
The ADRS bits are ignored in Single-shot mode.
00 =Interrupt is generated when each word is written to the buffer
01 =Interrupt is generated when the 2nd & 4th words are written to the buffer
10 =Interrupt is generated when the 4th word is written to the buffer
11 =Unimplemented
Unimplemented: Read as ‘0’
SSRCx<4:0>: A/D Trigger Source Select bits
00000 =All triggers disabled
xxxx1 =External interrupt RC3/INT0 starts A/D sequence
xxx1x =Timer5 starts A/D sequence
xx1xx =Input Capture 1 (IC1) starts A/D sequence
x1xxx =CCP2 compare match starts A/D sequence
1xxxx =Power Control PWM module rising edge starts A/D sequence
Legend:
R = Readable bit
-n = Value at Reset
ADRS1
R/W-0
Note 1: SSRCx<4:0> bits can be set such that any of the triggers will start conversion (e.g.
SSRCx<4:0)> = 00101, will trigger the A/D conversion sequence when RC3/INT0
or Input Capture 1 event occurs).
ADRS0
R/W-0
PIC18F2331/2431/4331/4431
Preliminary
U-0
W = Writable bit
‘1’ = bit is set
—
SSRC4
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = bit is cleared
SSRC3
R/W-0
SSRC2
R/W-0
x = bit is unknown
SSRC1
R/W-0
DS39616B-page 247
SSRC0
R/W-0
bit 0