PIC18F4431-E/PT Microchip Technology, PIC18F4431-E/PT Datasheet - Page 146

IC MCU FLASH 8KX16 44TQFP

PIC18F4431-E/PT

Manufacturer Part Number
PIC18F4431-E/PT
Description
IC MCU FLASH 8KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/PT

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4431-E/PT
Manufacturer:
JOHANSON
Quantity:
24 000
Part Number:
PIC18F4431-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2331/2431/4331/4431
13.2
The Timer2 module has an 8-bit period register, PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
FIGURE 13-1:
TABLE 13-1:
DS39616B-page 144
INTCON GIE/GIEH PEIE/GIEL
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend:
Name
Timer2 Interrupt
Timer2 Module Register
Timer2 Period Register
Note 1: TMR2 register output can be software selected by the SSP module as a baud clock.
x = unknown, u = unchanged, – = unimplemented read as ‘0’. Shaded cells are not used by the Timer2 module.
F
OSC
Bit 7
/4
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
TIMER2 BLOCK DIAGRAM
ADIF
ADIE
ADIP
Bit 6
T2CKPS1:T2CKPS0
1:1, 1:4, 1:16
Prescaler
TMR0IE
RCIE
RCIP
RCIF
Bit 5
2
INT0IE
Bit 4
TXIF
TXIE
TXIP
Comparator
Preliminary
TMR2
PR2
SSPIE
SSPIP
SSPIF
RBIE
Bit 3
EQ
Reset
13.3
The output of TMR2 (before the postscaler) is fed to the
Synchronous Serial Port module, which optionally uses
it to generate the shift clock.
TMR0IF
CCP1IE
CCP1IP
CCP1IF
TOUTPS3:TOUTPS0
Bit 2
Postscaler
1:1 to 1:16
Output of TMR2
Output
TMR2
TMR2IF
TMR2IE
TMR2IP
INT0IF
4
Bit 1
(1)
TMR1IE
TMR1IP
TMR1IF
Bit 0
RBIF
 2003 Microchip Technology Inc.
bit TMR2IF
Sets Flag
0000 000x 0000 000u
-000 0000 -000 0000
-000 0000 -000 0000
-111 1111 -111 1111
0000 0000 0000 0000
1111 1111 1111 1111
POR, BOR
Value on
Value on
all other
Resets

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