PIC18F4431-E/PT Microchip Technology, PIC18F4431-E/PT Datasheet - Page 216

IC MCU FLASH 8KX16 44TQFP

PIC18F4431-E/PT

Manufacturer Part Number
PIC18F4431-E/PT
Description
IC MCU FLASH 8KX16 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F4431-E/PT

Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Power Control PWM, QEI, POR, PWM, WDT
Number Of I /o
36
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 9x10b
Operating Temperature
-40°C ~ 125°C
Package / Case
44-TQFP, 44-VQFP
Controller Family/series
PIC18
No. Of I/o's
36
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F4431-E/PT
Manufacturer:
JOHANSON
Quantity:
24 000
Part Number:
PIC18F4431-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F2331/2431/4331/4431
FIGURE 18-1:
DS39616B-page 214
RC4/SDI/SDA
RC5/SDO
RA5/SS/AN4
RC3/SCK/
SCL
Peripheral OE
Read
SS Control
Select
TRISC<3>
Edge
Enable
bit0
Select
Edge
SSPBUF reg
SSP BLOCK DIAGRAM
(SPI MODE)
SSPM3:SSPM0
SSPSR reg
Clock Select
4
2
Prescaler
Write
4, 16, 64
Clock
Shift
TMR2 Output
Data Bus
Internal
2
T
CY
Preliminary
To enable the serial port, SSP enable bit SSPEN
(SSPCON<5>) must be set. To reset or reconfigure SPI
mode, clear bit SSPEN, reinitialize the SSPCON
register, and then set bit SSPEN. This configures the
SDI, SDO, SCK, and SS pins as serial port pins. For the
pins to behave as the serial port function, they must
have their data direction bits (in the TRISC register)
appropriately programmed. That is:
• SDI must have TRISC<4> set
• SDO must have TRISC<5> cleared
• SCK (Master mode) must have TRISC<3>
• SCK (Slave mode) must have TRISC<3> set
• SS must have TRISA<5> set and ADCON must
.
cleared
be configured such that RA5 is a digital I/O
Note 1: When the SPI is in Slave mode with SS
2: If the SPI is used in Slave mode with
3: When the SPI is in Slave mode with SS
pin control enabled (SSPCON<3:0> =
0100), the SPI module will reset if the SS
pin is set to V
CKE = 1, then the SS pin control must be
enabled.
pin control enabled (SSPCON<3:0> =
0100), the state of the SS pin can affect
the state read back from the TRISC<5>
bit. The Peripheral OE signal from the
SSP module into PORTC controls the
state that is read back from the
TRISC<5>
“PORTC, TRISC and LATC Registers”
for information on PORTC). If Read-
Modify-Write instructions, such as BSF,
are performed on the TRISC register
while the SS pin is high, this will cause the
TRISC<5> bit to be set, thus disabling the
SDO output.
 2003 Microchip Technology Inc.
DD
bit
.
(see
Section 10.3

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